AGGIOS products are centered around the concept of software defined energy management (SDEM). SDEM is an exciting new technology that enables innovation in how we design and manage energy, power and thermal characteristics of electronic devices. SDEM has three defining characteristics. First, SDEM abstracts higher-level platform behavior. Second, it separates the platform management plane from the processing plane. And third, SDEM consolidates the platform management plane, so that a single software platform manager controls multiple processing plane elements.

AGGIOS products support the SDEM concept with the Seed embedded software and the EnergyLab design tool with its UHA model library. The complete development cycle is covered from power simulation and trade-off analysis to run-time platform management and testing of the final product.

AGGIOS EnergyLab design tool is an integrated design environment (IDE) for the design, visualization, and test/measurement of power, energy, latency and thermal behavior of multicore SoCs, integrated platforms and complete applications. AGGIOS EnergyLab relies on the IEEE P2415 UHA standard and adapts the AGGIOS Seed embedded software to specifics of the customer hardware and software, optimizing operating characteristics such as power, energy, thermal, and latencies.

AGGIOS EnergyLab covers:

• Energy Modeling and Design
• Energy Simulation and Analysis
• Energy Verification and Validation
• Energy Management Generation and Configuration
• Energy Debugging and Optimization

With AGGIOS EnergyLab users can:

• Create and edit descriptions of the hardware and software details of their systems
• Support for IEEE P2415 UHA format
• Describe dependencies between components, including voltage domains, clock-trees, and reset lines
• Describe software and its dependencies on hardware
• Describe power management policies
• Design based on templates
• Represent the device and component hierarchy in graphical and tabular format;
• Simulate typical scenarios for a given system
• Analyze dependencies and their impacts on power states
• Single-step through scenarios to analyze behavior step by step, examining the influence of each event
• Easily change scenarios in order to compare different configurations, what-if analysis
• Visualize and inspect details regarding
• Energy profile
• Thermal profile
• Transition latencies
• Verify and validate their design
• Instant validation of model consistency and completeness
• Intuitive highlighting of problems in the description, verbose problem/remedy descriptions
• Identification and prevention of syntax errors
• Generate customized AGGIOS Seed embedded software, along with OS drivers and user space daemons;
• Export and import a variety of system and power description formats, including DTS, UPF/CPF and IP-XACT;

Supported hosts

AGGIOS EnergyLab is available for Linux and Windows.

Supported development boards

AGGIOS EnergyLab supports the following boards for test & measurement integration:

• Xilinx ZCU-102
• Xilinx ZCU-106
• Avnet UltraZed-EG^™ SOM
• Other boards upon request

AGGIOS Unified Hardware Abstraction (UHA) is an OS-agnostic formal description format. The AGGIOS UHA model library provides descriptions for standard hardware IP, enabling rapid and accurate power modeling tailored to custom systems and applications.

The UHA abstraction describes:

• The programmer’s view of SoC and board components (processors, busses, memories, accelerators, controllers, PMICs) with their operating states and operating points annotated with power, thermal, capability, latency, constraint, retention and transition information;
• Clock trees, voltage rails, power islands, reset trees, and their hardware and software control;
• Constraints as well as inter-component dependencies;
• OS tasks, routines and applications annotated with their energy requirements;
• Outside impacts on device’s power behavior;

UHA introduces the new Scene concept which describes typical use cases and user activities conducted on the device combined with energy consumption and quality of service information. Scenes are combined and transitioned by the Seed run-time software using user defined Scene transition tables and a set of Scene combination rules.

UHA is the proper superset of the Device Tree (DTS) enumeration and driver matching abstraction widely used by the Linux and Open Firmware communities making it easy to import and export the DTS files from UHA.

AGGIOS Seed embedded software enables run-time management of power, energy, latency and thermal characteristics for heterogeneous multicore multiOS SoCs and complete applications.
The Seed software drivers and firmware kernel complement the standard OSes and take full control over platform management:

• Detect and respond to power management directives by the various OSes including during power transitions;
• During OS suspend periods manage the sleep, suspend and dark wake states of the device;
• Coordinate power state changes of components, clusters and subsystems;
• Manage UHA operating points and scenes required by the application;
• Execute control code to retain state information during transitions;
• Change power states by directly accessing hardware components, including clocks, PLLs and PMICs;
• Provide run-time power and energy estimates;

Seed accomplishes the above tasks and delivers:

• Fast and precise execution of power state changes;
• Optimized power states meeting performance and latency requirements;
• Small footprint to fit within local memory of dedicated cores;
• Flexibility to distribute energy management across all the participating cores and OSes as well as type 1 and type 2 hypervisors;
• Support for wide range of processors ranging from application processors to dedicated power management and always-on-cores;

Supported target devices

Optimized Seed embedded software is available for all Xilinx UltraScale+ MPSoC devices, including:

• All UltraScale+ MPSoC CG devices
• All UltraScale+ MPSoC EG devices
• All UltraScale+ MPSoC EV devices

Seed embedded software can be generated for a wide range of other architectures and devices using the EnergyLab Seed generator.

AGGIOS Unified Hardware Abstraction (UHA) is an OS-agnostic formal description format. The AGGIOS UHA model library provides descriptions for standard hardware IP, enabling rapid and accurate power modeling tailored to custom systems and applications.

The UHA abstraction describes:

• The programmer’s view of SoC and board components (processors, busses, memories, accelerators, controllers, PMICs) with their operating states and operating points annotated with power, thermal, capability, latency, constraint, retention and transition information;
• Clock trees, voltage rails, power islands, reset trees, and their hardware and software control;
• Constraints as well as inter-component dependencies;
• OS tasks, routines and applications annotated with their energy requirements;
• Outside impacts on device’s power behavior;

UHA introduces the new Scene concept which describes typical use cases and user activities conducted on the device combined with energy consumption and quality of service information. Scenes are combined and transitioned by the Seed run-time software using user defined Scene transition tables and a set of Scene combination rules.

UHA is the proper superset of the Device Tree (DTS) enumeration and driver matching abstraction widely used by the Linux and Open Firmware communities making it easy to import and export the DTS files from UHA.

Software Defined Power Management for mobile applications...

Software Defined Power Management for wall-plugged applications...

Software Defined Power Management for IoT applications...