Products

  • EnergyLab - Design Tool

    AGGIOS EnergyLab design tool is an integrated design environment (IDE) for the design, visualization, and test/measurement of power, energy, latency and thermal behavior of multicore SoCs, integrated platforms and complete applications...

    Read more...
  • Seed Embedded Software

    AGGIOS Seed embedded software enables run-time management of power, energy, latency and thermal characteristics for heterogeneous multicore multi-OS SoCs and complete applications...

    Read more...
Aggios Products Overview

Company

  • About AGGIOS

    Software defined platform management (SDPM) is an exciting new technology that enables innovation in how we design and manage power, energy and thermal characteristics of electronic devices. SDPM has three defining characteristics. First, SDPM abstracts higher-level platform behavior. Second, it separates the platform management plane from the processing plane. And third, SDPM consolidates the platform management plane, so that a single software platform manager controls multiple processing plane elements...

    Read more...
Aggios Company Image

Videos

    Video: AGGIOS EnergyLab and Seed for UltraZed
  • How to use the AGGIOS EnergyLab tool to estimate and measure power for an Avnet UltraZed-EG board.
    How to optimize power consumption on the target using the AGGIOS Seed firmware.

    AGGIOS Seedling Power Reference Design | Region of Interest Tracking
  • Video Encoding/Decoding and Region of Interest (ROI) tracking Power Reference Design for Xilinx Zynq UltraScale+ MPSoC, delivering power optimized ROI 1080p video streaming on a Xilinx ZCU106 board.

    AGGIOS Seedling Power Reference Design | Video Encoding/Decoding
  • Video Encoding/Decoding Power Reference Design for Xilinx Zynq UltraScale+ MPSoC, delivering power optimized 1080p60 video streaming on a Xilinx ZCU106 board.

    Video: AGGIOS EnergyLab and Seed for NXP i.MX 8X
  • How to use the AGGIOS EnergyLab tool to estimate and measure power for an NXP i.MX 8QXP MEK board.
    How to optimize power consumption on the target using the AGGIOS Seed firmware.

    Video: AGGIOS EnergyLab and Seed for Xilinx Zynq Ultrascale+ MPSoC
  • How to use the AGGIOS EnergyLab tool to estimate and measure power for a Xilinx ZCU102 board.
    How to optimize power consumption on the target using the AGGIOS Seed firmware.

AGGIOS products are centered around the concept of software defined energy management (SDEM). SDEM is an exciting new technology that enables innovation in how we design and manage energy, power and thermal characteristics of electronic devices. SDEM has three defining characteristics. First, SDEM abstracts higher-level platform behavior. Second, it separates the platform management plane from the processing plane. And third, SDEM consolidates the platform management plane, so that a single software platform manager controls multiple processing plane elements.

AGGIOS products support the SDEM concept with the Seed embedded software and the EnergyLab design tool with its UHA model library. The complete development cycle is covered from power simulation and trade-off analysis to run-time platform management and testing of the final product.

Aggios Products Overview
  • EnergyLab Design Tool

    AGGIOS EnergyLab design tool is an integrated design environment (IDE) for the design, visualization, and test/measurement of power, energy, latency and thermal behavior of multicore SoCs, integrated platforms and complete applications...

    Read more...
  • Seed Embedded Software

    AGGIOS Seed embedded software enables run-time management of power, energy, latency and thermal characteristics for heterogeneous multicore multi-OS SoCs and complete applications...

    Read more...
    AGGIOS EnergyLab and Seed for UltraZed
  • How to use the AGGIOS EnergyLab tool to estimate and measure power for an Avnet UltraZed-EG board.
    How to optimize power consumption on the target using the AGGIOS Seed firmware.

    AGGIOS EnergyLab and Seed for NXP i.MX 8X
  • How to use the AGGIOS EnergyLab tool to estimate and measure power for an NXP i.MX 8QXP MEK board.
    How to optimize power consumption on the target using the AGGIOS Seed firmware.

    AGGIOS EnergyLab and Seed for Xilinx Zynq Ultrascale+ MPSoC
  • How to use the AGGIOS EnergyLab tool to estimate and measure power for a Xilinx ZCU102 board.
    How to optimize power consumption on the target using the AGGIOS Seed firmware.

AGGIOS EnergyLab design tool is an integrated design environment (IDE) for the design, visualization, and test/measurement of power, energy, latency and thermal behavior of multicore SoCs, integrated platforms and complete applications. AGGIOS EnergyLab relies on the IEEE P2415 UHA standard and adapts the AGGIOS Seed embedded software to specifics of the customer hardware and software, optimizing operating characteristics such as power, energy, thermal, and latencies.

AGGIOS EnergyLab covers:

  • Energy Modeling and Design
  • Energy Simulation and Analysis
  • Energy Verification and Validation
  • Energy Management Generation and Configuration
  • Energy Debugging and Optimization
Energylab

With AGGIOS EnergyLab users can:

  • Create and edit descriptions of the hardware and software details of their systems
    • Support for IEEE P2415 UHA format
    • Describe dependencies between components, including voltage domains, clock-trees, and reset lines
    • Describe software and its dependencies on hardware
    • Describe power management policies
    • Design based on templates
  • Represent the device and component hierarchy in graphical and tabular format;
  • Simulate typical scenarios for a given system
    • Analyze dependencies and their impacts on power states
    • Single-step through scenarios to analyze behavior step by step, examining the influence of each event
    • Easily change scenarios in order to compare different configurations, what-if analysis
    • Visualize and inspect details regarding
      • Energy profile
      • Thermal profile
      • Transition latencies
  • Verify and validate their design
    • Instant validation of model consistency and completeness
    • Intuitive highlighting of problems in the description, verbose problem/remedy descriptions
    • Identification and prevention of syntax errors
  • Generate customized AGGIOS Seed embedded software, along with OS drivers and user space daemons;
  • Export and import a variety of system and power description formats, including DTS, UPF/CPF and IP-XACT;

Energylab

Supported hosts

AGGIOS EnergyLab is available for Linux and Windows.

Supported development boards

AGGIOS EnergyLab supports the following boards for test & measurement integration:

  • Xilinx ZCU-102
  • Xilinx ZCU-106
  • Avnet UltraZed-EG SOM
  • Other boards upon request

 

UHAL® Model Library

AGGIOS Unified Hardware Abstraction (UHA) is an OS-agnostic formal description format. The AGGIOS UHA model library provides descriptions for standard hardware IP, enabling rapid and accurate power modeling tailored to custom systems and applications.

The UHA abstraction describes:

  • The programmer’s view of SoC and board components (processors, busses, memories, accelerators, controllers, PMICs) with their operating states and operating points annotated with power, thermal, capability, latency, constraint, retention and transition information;
  • Clock trees, voltage rails, power islands, reset trees, and their hardware and software control;
  • Constraints as well as inter-component dependencies;
  • OS tasks, routines and applications annotated with their energy requirements;
  • Outside impacts on device’s power behavior;
Uha Components

UHA introduces the new Scene concept which describes typical use cases and user activities conducted on the device combined with energy consumption and quality of service information. Scenes are combined and transitioned by the Seed run-time software using user defined Scene transition tables and a set of Scene combination rules.

UHA is the proper superset of the Device Tree (DTS) enumeration and driver matching abstraction widely used by the Linux and Open Firmware communities making it easy to import and export the DTS files from UHA.

AGGIOS Seed embedded software enables run-time management of power, energy, latency and thermal characteristics for heterogeneous multicore multiOS SoCs and complete applications.
The Seed software drivers and firmware kernel complement the standard OSes and take full control over platform management:

  • Detect and respond to power management directives by the various OSes including during power transitions;
  • During OS suspend periods manage the sleep, suspend and dark wake states of the device;
  • Coordinate power state changes of components, clusters and subsystems;
  • Manage UHA operating points and scenes required by the application;
  • Execute control code to retain state information during transitions;
  • Change power states by directly accessing hardware components, including clocks, PLLs and PMICs;
  • Provide run-time power and energy estimates;

Seed accomplishes the above tasks and delivers:

  • Fast and precise execution of power state changes;
  • Optimized power states meeting performance and latency requirements;
  • Small footprint to fit within local memory of dedicated cores;
  • Flexibility to distribute energy management across all the participating cores and OSes as well as type 1 and type 2 hypervisors;
  • Support for wide range of processors ranging from application processors to dedicated power management and always-on-cores;

Supported target devices

Optimized Seed embedded software is available for all Xilinx UltraScale+ MPSoC devices, including:

  • All UltraScale+ MPSoC CG devices
  • All UltraScale+ MPSoC EG devices
  • All UltraScale+ MPSoC EV devices

Seed embedded software can be generated for a wide range of other architectures and devices using the EnergyLab Seed generator.

AGGIOS Seedling Power Reference Design | Region of Interest Tracking

  • Video Encoding/Decoding and Region of Interest (ROI) tracking Power Reference Design for Xilinx Zynq UltraScale+ MPSoC, delivering power optimized ROI 1080p video streaming on a Xilinx ZCU106 board.

AGGIOS Seedling Power Reference Design | Video Encoding/Decoding

  • Video Encoding/Decoding Power Reference Design for Xilinx Zynq UltraScale+ MPSoC, delivering power optimized 1080p60 video streaming on a Xilinx ZCU106 board.

AGGIOS EnergyLab and Seed for UltraZed

  • How to use the AGGIOS EnergyLab tool to estimate and measure power for an Avnet UltraZed-EG board.
    How to optimize power consumption on the target using the AGGIOS Seed firmware.

AGGIOS EnergyLab and Seed for NXP i.MX 8X

  • How to use the AGGIOS EnergyLab tool to estimate and measure power for an NXP i.MX 8QXP MEK board.
    How to optimize power consumption on the target using the AGGIOS Seed firmware.

AGGIOS EnergyLab and Seed for Xilinx Zynq Ultrascale+ MPSoC

  • How to use the AGGIOS EnergyLab tool to estimate and measure power for a Xilinx ZCU102 board.
    How to optimize power consumption on the target using the AGGIOS Seed firmware.

UHAL® Model Library

AGGIOS Unified Hardware Abstraction (UHA) is an OS-agnostic formal description format. The AGGIOS UHA model library provides descriptions for standard hardware IP, enabling rapid and accurate power modeling tailored to custom systems and applications.

The UHA abstraction describes:

  • The programmer’s view of SoC and board components (processors, busses, memories, accelerators, controllers, PMICs) with their operating states and operating points annotated with power, thermal, capability, latency, constraint, retention and transition information;
  • Clock trees, voltage rails, power islands, reset trees, and their hardware and software control;
  • Constraints as well as inter-component dependencies;
  • OS tasks, routines and applications annotated with their energy requirements;
  • Outside impacts on device’s power behavior;
Uha Components

UHA introduces the new Scene concept which describes typical use cases and user activities conducted on the device combined with energy consumption and quality of service information. Scenes are combined and transitioned by the Seed run-time software using user defined Scene transition tables and a set of Scene combination rules.

UHA is the proper superset of the Device Tree (DTS) enumeration and driver matching abstraction widely used by the Linux and Open Firmware communities making it easy to import and export the DTS files from UHA.

Mobile Devices

Software Defined Power Management for mobile applications...

Wall-plugged Devices

Software Defined Power Management for wall-plugged applications...

Internet of Things (IoT)

Software Defined Power Management for IoT applications...

In 2012, a team of ex ARM and Qualcomm engineers joined forces to revolutionize energy management of electronic devices and formed the company AGGIOS (stands for AGGregated IO Systems). Today, AGGIOS is the leading independent provider of energy management software and design tools for battery-powered and plugged electronic devices, ranging from mobile radios, over set top boxes to servers. In collaboration with our semiconductor partners, AGGIOS run-time software successfully manages millions of electronic devices world-wide prolonging battery life and reducing energy footprint. AGGIOS design tools assure designers that every micro Joule of energy is accounted for, resulting in highly efficient, smaller and cooler electronic devices.

Vojin Zivojnovic

is co-founder and CEO of AGGIOS. Prior to starting AGGIOS he was ARM’s Vice President responsible for WW OEM and Foundry business development and sales. In 1997 Vojin co-founded AXYS Design Automation (Irvine, CA), the pioneer in multicore system design methodology, and served as AXYS Design’s CEO until the acquisition by ARM in 2004. Prior to AXYS Design he led simulation and modeling efforts at Rockwell Semiconductors. Vojin received his Ph.D. in computer science from Aachen University of Technology in Germany and has published over 60 research papers in statistical signal processing, DSPs, design methodology and embedded software.

Davorin Mista

is co-founder and VP of Engineering of AGGIOS. Davorin has 17 years of software development and management experience at Smavicon, AXYS Design, ARM and Adconion. At AXYS Design Davorin led the worldwide engineering teams (US and Germany) and managed its complete line of products. After the acquisition of AXYS by ARM Davorin assumed various engineering management roles at ARM, including the engineering management of the System Tools Group. Davorin holds an M.Sc. in Electrical Engineering from Technical University of Darmstadt, Germany.

Tom Collopy

is CTO (acting) of AGGIOS. Tom brings over 27 years of experience in a broad-range of technical, management, marketing, and business development positions in Xcella (startup), Qualcomm, Ford and IBM. Most recently he was Vice President of Engineering for Qualcomm responsible for software development for the Smartphone/Smartbook market. He, along with two other co-founders, formed the now 250+ person Qualcomm Raleigh site. Tom received his Master’s degree in Electrical Engineering from Syracuse University and his Bachelor’s degree from The University of Michigan in Electrical Engineering.

The AGGIOS team is advised by a team of power design, methodology and operating system experts from UC Berkeley and Princeton University.

AGGIOS is employee-owned and has its offices in Irvine, CA, USA.

In 2012, a team of ex ARM and Qualcomm engineers joined forces to revolutionize energy management of electronic devices and formed the company AGGIOS (stands for AGGregated IO Systems). Today, AGGIOS is the leading independent provider of energy management software and design tools for battery-powered and plugged electronic devices, ranging from mobile radios, over set top boxes to servers. In collaboration with our semiconductor partners, AGGIOS run-time software successfully manages millions of electronic devices world-wide prolonging battery life and reducing energy footprint. AGGIOS design tools assure designers that every micro Joule of energy is accounted for, resulting in highly efficient, smaller and cooler electronic devices.

Vojin Zivojnovic

is co-founder and CEO of AGGIOS. Prior to starting AGGIOS he was ARM’s Vice President responsible for WW OEM and Foundry business development and sales. In 1997 Vojin co-founded AXYS Design Automation (Irvine, CA), the pioneer in multicore system design methodology, and served as AXYS Design’s CEO until the acquisition by ARM in 2004. Prior to AXYS Design he led simulation and modeling efforts at Rockwell Semiconductors. Vojin received his Ph.D. in computer science from Aachen University of Technology in Germany and has published over 60 research papers in statistical signal processing, DSPs, design methodology and embedded software.

Davorin Mista

is co-founder and VP of Engineering of AGGIOS. Davorin has 17 years of software development and management experience at Smavicon, AXYS Design, ARM and Adconion. At AXYS Design Davorin led the worldwide engineering teams (US and Germany) and managed its complete line of products. After the acquisition of AXYS by ARM Davorin assumed various engineering management roles at ARM, including the engineering management of the System Tools Group. Davorin holds an M.Sc. in Electrical Engineering from Technical University of Darmstadt, Germany.

Tom Collopy

is CTO (acting) of AGGIOS. Tom brings over 27 years of experience in a broad-range of technical, management, marketing, and business development positions in Xcella (startup), Qualcomm, Ford and IBM. Most recently he was Vice President of Engineering for Qualcomm responsible for software development for the Smartphone/Smartbook market. He, along with two other co-founders, formed the now 250+ person Qualcomm Raleigh site. Tom received his Master’s degree in Electrical Engineering from Syracuse University and his Bachelor’s degree from The University of Michigan in Electrical Engineering.

The AGGIOS team is advised by a team of power design, methodology and operating system experts from UC Berkeley and Princeton University.

AGGIOS is employee-owned and has its offices in Irvine, CA, USA.

AGGIOS is hiring

Jobs in Irvine, CA

  • Embedded Software Engineer - Linux
    AGGIOS is looking for embedded software engineers to join our team working on power and energy management solutions for state-of-the-art processors, systems, and devices.

    Qualifications
    Do you have at least 5 years of experience as well as expertise in Embedded Linux, power management and device drivers? Then this position might be for you!

    See detailed job description...

  • Junior Software Engineer
    AGGIOS is looking for college graduates to join our team working on exciting projects in power and energy management of embedded systems.

    Qualifications
    Do you have a Bachelors or Masters degree in computer science, electrical engineering or equivalent and enjoy programming in C/C++? Then this position might be for you!

    See detailed job description...

Coming soon...

Latest news

Blogs

  • August 24th, 2020

    SemiWiki: Moving to Deeply Scaled Nodes for Power? There is a Better Way

    Did you know you can save 30% to 60% power without spending a fortune on a process migration? There is a better way than moving to deeply scaled nodes for power.

    Read more...

  • December 8, 2015 - EE-Times Embedded.com

    Solving power management of multiprocessor systems with the eXtensible Energy Management Interface

    The Latency/Power Tradeoff Problem
    There is currently no commonly used standard to manage system power in heterogeneous multiprocessor systems. Each vendor must reinvent APIs and protocols to handle power management and spend time integrating these APIs into each codebase for every processing core in the system. To meet market windows, vendors tend to leverage existing power management solutions in the software they use for each core and then loosely couple these cores together to create ad hoc power-management regimes. These ad hoc regimes tend to have high latency power-state transitions. To work around this, companies create static, infrequently updated data-driven approaches, trading off latency for power. Because of these tradeoffs, vendors have to leave power on the table.

    New Power API for Heterogeneous Processors
    A solution to this problem is to create an API specification that all software vendors can reasonably implement, a spec that acts as an underlying power management substrate...

    Read more...

  • November 13, 2015 - Xcell Daily Blog

    AGGIOS Seed Energy Manager Provides Software Defined Power Management for Xilinx Zynq UltraScale+ MPSoC

    Yesterday, AGGIOS announced its Seed Energy Manager, which provides software defined power management for the Xilinx Zynq UltraScale+ MPSoC. I saw this new power-management tool in action yesterday at ARM TechCon in Silicon Valley. In conjunction with the company’s EnergyLab energy management synthesis tool, Seed Energy Manager gives you remarkably simple control over the power consumption of complex, multi-processor systems based on the Zynq MPSoC.

    Read more...

  • November 6, 2014 - Semiconductor Engineering

    Designing For Energy Efficiency

    What changes when the first priority is longer battery life or reducing a seven-figure energy bill?

    Read more...

  • January 20, 2014 - Semiconductor Engineering

    Experts At The Table: What’s Next?

    Why your set-top box is a power hog and how to increase time between charges in mobile devices; where to find some huge power savings.

    Read more...

  • November 13, 2013 - EE-Times

    Energy Design Needs Unified Hardware Abstraction

    Energy-efficient product design, for both portable and plug-load devices, leads the list of on-going engineering priorities.
    While mobile device makers have been forced by consumers' insatiable mobility requirements and fierce competition to significantly improve battery life, fixed-power products have been slower to deliver better energy consumption characteristics.
    But a combination of government mandates, rising energy costs, facility limitations, and a general movement to all things green makes energy efficiency a top-level concern for every type of electronics maker.

    Read more...

  • October 24, 2013 - Semiconductor Engineering

    Lessons from the Big Apple

    Low-power designs for all of us—and why standards may show the way.

    Read more...

  • October 10, 2013 - Semiconductor Engineering

    On-Chip MCUs Excel At Power Management

    When it comes to supplying power to an SoC, there is an increasing trend to make it more intelligent. On-chip MCUs can help here.

    Read more...

Resources

  • July 28th, 2020

    Whitepaper: AGGIOS Seedlings Power Reference Designs: Xilinx Zynq UltraScale+ MPSoC

    AGGIOS Seedlings Power Reference Designs (PRDs) are complete applications optimized for power and thermal behavior while preserving full functionality. Based on the AGGIOS Seed power manager, Seedlings reduce time- to-market and development costs by providing comprehensive solutions for out-of-the-box implementation of standard applications on commercially available boards. Seedlings are delivered with pre-configured Seed power management software and the EnergyLab test & measurement tool for verification of power and thermal characteristics of the application.
    This white paper presents power measurement results for Seedlings of Xilinx Zynq® UltraScale+ MPSoCs using Xilinx Targeted Reference Design (TRDs) and other reference applications. For comparison, power measurements are also provided for the original non-optimized reference designs.

    Read more...

  • November 28, 2013

    Telfor 2013: Energy Proportional Management of Residential Gateways

    Abstract — We are presenting a novel methodology for energy proportional management of electronic devices on the example of a triple-play broadband residential gateway. Using the newly developed formal abstraction of hardware and software, combined with the associated design tools, it was possible to automate the generation of the energy management software and meet the regulatory energy requirements. The resulting energy savings amounted to 31%, 38% and 71% in the active, idle and sleep modes, respectively. Based on the expected 2014 worldwide gateway production, the achieved savings are predicted to reach half of the annual output of a 500MW coal-fired power plant.

    View Paper...

  • October 8, 2013

    AGGIOS invited talk at the 18th Si2 conference: The Case for Unified Hardware Abstraction

    View Presentation...

  • September 8, 2013

    International Energy Agency: Power Requirements for Functions

    View Full Report...

  • April 10, 2012

    EuroSys 2012: Where is the energy spent inside my app?

    Despite the immense popularity of smartphones and the fact that energy is the most crucial aspect in smartphone programming, the answer to the above question remains elusive. This paper first presents eprof, the first fine-grained energy profiler for smartphone apps. Compared to profiling the runtime of applications running on conventional computers, profiling energy consumption of applications running on smartphones faces a unique challenge, asynchronous power behavior, where the effect on a component’s power state due to a program entity lasts beyond the end of that program entity. We present the design, implementation and evaluation of eprof on two mobile OSes, Android and Windows Mobile.

    View Paper...

Support

AGGIOS Inc.

5251 California Ave
Suite 120
Irvine CA 92617
U.S.A.

+1 949 212 0130

info@aggios.com

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